Some of you have seen me build simple models to do a reality-check on architecture (see here, for example). Here are some metrics from a great presentation by Jeff Dean, a Google fellow.
Numbers Everyone Should Know
| L1 cache reference | 0.5 ns |
| Branch mispredict | 5 ns |
| L2 cache reference | 7 ns |
| Mutex lock/unlock | 25 ns |
| Main memory reference | 100 ns |
| Compress 1K bytes with Zippy | 3,000 ns |
| Send 2K bytes over 1 Gbps network | 20,000 ns |
| Read 1 MB sequentially from memory | 250,000 ns |
| Round trip within same datacenter | 500,000 ns |
| Disk seek | 10,000,000 ns |
| Read 1 MB sequentially from disk | 20,000,000 ns |
| Send packet CA->Netherlands->CA | 150,000,000 ns |
Of note is the 120X difference between the cost of reading 1MB from memory and the cost of reading 1MB from disk…
The entire presentation may be found here: http://www.odbms.org/download/dean-keynote-ladis2009.pdf
Happy Modeling…
It is worth noting that these numbers are circa 2009. Memory clock speeds improve based on Moore’s Law. Disk data transfer rates to not… so the 80X advantage of memory over disk listed here is conservative.
These metrics provide the price/performance rationale for in-memory databases (IMDB).
More on memory speeds can be found at:
http://en.wikipedia.org/wiki/DDR3_SDRAM